In an electronic control circuit for an electronically commutated DC motor (EC motor) having a three-phase stator winding and a permanent magnet-excited rotor as referred to in German Published Patent Application No. 43 10 260, three semiconductor switches configured as MOS FETs are each connected in series with a winding phase of the stator winding, and the three series circuits are connected in parallel. The control terminals of the semiconductor switches receive commutating signal-triggered control signals, which depend on the rotor position, so that the semiconductor switches may be triggered using a current flow angle, definable by the length of the control signals, within the commutating angle (block control). In order to avoid undesired features of block control in the lower rpm range (occurrence of high current peaks at low motor speeds and noisy operation), in a lower rpm segment at 100% triggering, the amplitude of the control signal is increased with increasing rpm up to a first rpm (linear control), then with increasing rpm up to a second rpm the amplitude of the control signals is increased to a maximum and at the same time the degree of triggering of the current flow angle (block length) is reduced from 100% to a lower value. Then, starting at the second rpm, with increasing rpm up to the maximum rpm, the degree of triggering is increased again from the lower value to 100% with maximum amplitude of the control signals. The pure block control in the upper rpm range may avoid the lower efficiency, which may be inherent in linear control.
In variable-speed EC motors, also known as brushless DC motors, there are motor topologies where the power loss in the semiconductor switches does not increase with the motor output, but rather is higher in the partial load range than in the full load range. This may be undesirable in particular for drives whose intrinsic cooling increases with increased power output of the DC motor, such as for example in pump motors, which are cooled by the medium pumped. Such motor topologies may be encountered, for example, in EC motors having a single-strand or multistrand, even-numbered multiphase winding, for example, a double-strand four-phase winding or a three-strand six-phase winding. These EC motors may be controlled in cycled operation by pulse-width (PW) modulation. With increased pulse control factor of the cycle, i.e., switched-on time of the semiconductor switch in relation to the cycle length, the power losses in the semiconductor switches increase more than proportionally, so that such EC motors are not operated in the cyclic mode in the upper motor output range, and the motor output is changed by varying the block length via the block control. In this case, the time periods in which the individual winding phases are energized increasingly overlap. In this type of control, the maximum power loss in the semiconductor switches may occur shortly before the transition from cycled operation to block operation.